| OE1 | 1 • | 16 | Vcc |
| OE2 | 2 | 15 | MR |
| Q0 | 3 | 14 | D0 |
| Q1 | 4 | 13 | D1 |
| Q2 | 5 | 12 | D2 |
| Q3 | 6 | 11 | D3 |
| CP | 7 | 10 | E2 |
| GND | 8 | 9 | E1 |
| Pin | Symbol | Description |
|---|---|---|
| 1 | OE1 | output enable input (active low) |
| 2 | OE2 | output enable input (active low) |
| 3 | Q0 | 3-state flip-flop output |
| 4 | Q1 | 3-state flip-flop output |
| 5 | Q2 | 3-state flip-flop output |
| 6 | Q3 | 3-state flip-flop output |
| 7 | CP | clock input (low-to-high, edge-triggered) |
| 8 | GND | ground |
| 9 | E1 | data enable input (active low) |
| 10 | E2 | data enable input (active low) |
| 11 | D3 | data input |
| 12 | D2 | data input |
| 13 | D1 | data input |
| 14 | D0 | data input |
| 15 | MR | asynchronous master reset (active high) |
| 16 | Vcc | supply voltage |
| Parameter | Value | Unit |
|---|---|---|
| Propagation delay, CP to Qn | 17 (74HC/HCT) | ns |
| Propagation delay, MR to Qn | 13 (74HC) 17 (74HCT) | ns |
| Maximum clock frequency | 88 (74HC/HCT) | MHz |
Note: Data is maintained by an independent source and accuracy is not guaranteed. Check with the manufacturer's datasheet for up-to-date information.