1802 - CDP1802 CMOS 8-bit microprocessor


CLOCK	1 •	40	V_DD
WAIT	2	39	XTAL
CLEAR	3	38	DMA_IN
Q	4	37	DMA_OUT
SC1	5	36	INTERRUPT
SC0	6	35	MWR
MRD	7	34	TPA
BUS 7	8	33	TPB
BUS 6	9	32	MA7
BUS 5	10	31	MA6
BUS 4	11	30	MA5
BUS 3	12	29	MA4
BUS 2	13	28	MA3
BUS 1	14	27	MA2
BUS 0	15	26	MA1
V_CC	16	25	MA0
N2	17	24	EF1
N1	18	23	EF2
N0	19	22	EF3
V_SS	20	21	EF4

Pin	Symbol	Description
1	CLOCK	input for externally generated single-phase clock
2	WAIT	control line
3	CLEAR	control line
4	Q	general output
5	SC1	state code
6	SC0	state code
7	MRD	read pulse
8	BUS 7	data bus
9	BUS 6	data bus
10	BUS 5	data bus
11	BUS 4	data bus
12	BUS 3	data bus
13	BUS 2	data bus
14	BUS 1	data bus
15	BUS 0	data bus
16	V_CC	I/O voltage supply
17	N2	I/O control line
18	N1	I/O control line
19	N0	I/O control line
20	V_SS	ground
21	EF4	I/O flag
22	EF3	I/O flag
23	EF2	I/O flag
24	EF1	I/O flag
25	MA0	memory address
26	MA1	memory address
27	MA2	memory address
28	MA3	memory address
29	MA4	memory address
30	MA5	memory address
31	MA6	memory address
32	MA7	memory address
33	TPB	timing pulse
34	TPA	timing pulse
35	MWR	write pulse
36	INTERRUPT	interrupt
37	DMA_OUT	DMA out
38	DMA_IN	DMA in
39	XTAL	crystal input, for on-chip oscillator
40	V_DD	internal voltage supply

Specifications

(typical values under recommended operating conditions, unless specified)

Parameter	Value	Unit
Maximum input clock maximum frequency at 5V	3.2	MHz
Maximum input clock maximum frequency at 10V	6.4	MHz
Minimum instruction fetch-execute time at 5V	5.0	µs

Note: Data is maintained by an independent source and accuracy is not guaranteed. Check with the manufacturer's datasheet for up-to-date information.